The DSP bus

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Subsections

The DSP bus

at the DSP bus one or more I/O modules can be attached. This is based in principle on a ESSI bus with additional configuration pins.

Motorola DSP56301 users manual, P. 8-1:

There are two independent and identical Synchronous Serial Interfaces in the DSP56301: ESSI0 and ESSI1 For simplicity a single generic ESSI will be described.

The enhanced synchronous serial interface (ESSI) provides a full-duplex serial port for serial communication with a variety of serial devices including one or more industry standard codec, other DSP, microprocessor, and peripherals which implement the Motorola SPI. The ESSI consists of independent transmitter and receiver sections and a common ESSI clock generator. [...] This interface is named synchronous because all serial transfers are synchronized to a clock. Additional synchronization signals are used to delineate the word frame. The normal mode of oper ation is used to transfer data at a periodicrate, one word per per iod. The network mode is similar in that it is also intended for periodic transfers; however, it will support up to 32 words (time slots) per period. This mode can be used to build time division multiplexed (TDM) network. In contrast, the on-demand mode is intended for non-periodic transfers of data. This mode can be used to transfer data serially at high speed when the data becomes available. This mode offers a subset of the SPI protocol.

Implementation

The goal is to use the ''network mode'', with which the serial data stream is divided into frames and these into timeslots (max 256 Bit/Frame) and the framerate is the samplerate of optional AD/DA-devices. These time-slots can then be assigned to the different I/O-modules. Thus, e.g.: with DA transducer 16 bit/channel, can drive max. 16 channels per transmitter or receceiver channel.

One ESSI can be configured in such a way that up to 3 transmit-channels (in synchron mode) and one receive channel can be used. In the asynchronous mode two of the transmit channels are used for additional synchronisation, as described in the DSP manual.

The Receive DATA channel can be divided, like the transmitchannel into 16 Slots with each 16 Bit and thus, e.g.: receive with 16 Bit-ADs you can drive 16 channels.

With 32Bit AD or DA controllers (like AES-EBU needs) half of the channels can be realised.

Since there are two of these interfaces, max. 32 outputchannels with 16 Bit (or 3x32=96 of output channels with synchronous operation) with 16 Bit and 32 input channels can be implemented. With 32 Bit per channel (e.g.: 20 Bit AD,DA or AES/EBU) bisects itself this number of channels.

The modules with 16-Bit, 24-Bit and 32-Bit can be mixed.

Practically however each hardware can be attached, which reserves a certain bitcount of the serial data stream (like displays, keys, etc.).

The problem of synchronisation is handled with the additional direction-pins for serial-clock in or out and the direction of the framesync-pins.

As a next special features there are three output pins for defining the samplerate, which should be used (if possible) from the peripheral.

SR0 SR1 SR2 Description
0 x x Extern Clocked
1 0 0 off
1 0 1 32 kHz
1 1 0 44.1 kHz
1 1 1 48 kHz

Two additionals pins are added special for controlling CODECs, which are D/C (Data/Control), to get the Control Data to the CODECs and /RESET to reset all the peripheral Chips.

Six more Pins on the connector are not connected from the DSP-Board, so that they can be used within the peripheral Moduls for Stacking ADDA-Converters.

Serial Control and Status I/O Interface

The idea is, because of a now not known number of needed I/O pins for configuration of the hardwaremodules, to implement a easy and costless way to offer these pins. Therefore the idea is using 5 I/O-Pins for controlling shiftregister chips, which decode the bits for I/O -Pins. The shiftregisters on the hardware modules are serialized, so that whith each shift register the count of I/O bits is encreased.

Of course, the programm which handles these, has to know about these shift registers on the modules and the order of the modules, which in fact is always, when a hardware module is connected and the module driver is initialized1.3.


  
Figure 1.3: Slow Serial I/O Bit Bus
\begin{figure}\epsfig{file = abb/serial_io_signal.eps,width=\textwidth}\end{figure}

Serial Data Out:
This pin sets the output data for each Clock.

Serial Data In:
This pin reads the input data for each Clock.

Serial ClocK:
This pin clocks the data out and in the shiftregisters. This has not to be a fix clock and the clock width can change with each bit.

Validate Data Output:
When this pin is changed to true, all data in the shift-registers are latched to the output-register and therfore to the out-pins.

Read Data in:
When this pin is changed to true, all data-ins in the shift registers are latched in the shift register and can be now clocked in.

Signals and Pins on the DSP-Bus

see the hardware manual for up to date list.

cnt pins signal direction description
  1 TXD O Transmitter Data Send
  1 TFSync (I/)O Transmitter Frame Sync
5 1 TSCK (I/)O Transmitter Bit Clock
  1 SyncExt O Sync direction (Extern or from DSP)
  1 SCKExt O SCK direction(extern or from DSP)
  1 RXD I Transmitter Data Send
  1 RFSync (I/)O Transmitter Frame Sync
5 1 RSCK (I/)O Transmitter Bit Clock
  1 SyncExt O Sync direction (Extern or from DSP)
  1 SCKExt O SCK direction (extern or From DSP)
  3 SR1-3 O Sample Rate Output
4 1 D/C O DATA, Control
  1 /RESET O Reset the Interfaces
  1 SCSIOT O Serial C&S IO Data Transmit
  1 SCSIOR I Serial C&S IO Data Receive
5 1 SCSIOCLK O Serial C&S IO Clock
  1 SCSIOTS O Serial C&S IO Data Out Strobe
  1 SCSIORS O Serial C&S IO Data In Strobe
1 1 FTI I Free Timer Input
7 7 GND - logic ground
4 2 +5V O small supply + 5V
  2 GND O small supply ground
2 1 +12V O small supply + 12V
  1 GND O small supply ground
2 1 -12V O small supply - 12V
  1 GND O small supply ground
6 6 RSV - Reserved for external use
5/0 5/0 N.C. - not used

So a 50pin connector is used for the wiring from DSP-board to the modul-interfaces, which we decided to use connectors like SCSI-2 connection, because they are available and designed for high speed data transfers. The highspeed data lines are always sourounded by ground lines to get a better signal handling.

For the RS232 or MIDI-Interface on the board there are additional connectors:

cnt signal direction description
2 MSx+/MSx- O (+/-) MidiOut
2 MTx+/MTx- O (+/-) MidiThru
2 MRx+/MRx- I (+/-) MidiIn

oder optional 3 wire-RS232:

cnt signal direction description
1 RTX O Transmit Data
1 RRX I Receive Data
2 GND O Ground

next up previous contents
Next: Modules Up: Hardware Previous: DSP-Card
HAss.DI Winfried Ritsch - ritsc@iem.kug.ac.at